Suppose doubling the number of general-purpose registers from 32 to 64 would reduce the number of ld and sd instruction by 12%, but increase the latency of the register file from 150 ps to 160 ps and double the cost from 200 to 400. (Use the instruction mix [from 3(a) above] and ignore the other effects on the ISA)

In a unit cell of fcc structure, indicate the position of one of the tetrahedral interstitial sites by plotting the corresponding tetrahedron. do the same for one of the octahedral interstitial sites (in a separate fcc unit cell). mark the positions of all the tetrahedral and octahedral interstitial sites in the unit cells. how many equivalent tetrahedral sites and how many equivalent octahedral sites are contained in a fcc unit cell, respectively. what is the coordination number for a tetrahedral site and what is the coordination number for an octahedral site?