Construct a simple sequential circuit with input d and output q which delays the input by two clock cycles on negative clock edge using d flip-flops built with two d latches.

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Explanation:

I'm not sure if this is correct but this is what I got.

The black-ink part is a 2-bit counter. It basically counts up from 00₂ to 11₂ and resets. That counter will count up 1 value for every clock pulse.

Then the orange part is a comparator. It senses when the counter reaches the value 10₂ or 2₁₀. So the orange part will trigger every 2 clock pulses. The output of the orange part will trigger the reset pin to reset the count back to 00₂.

The pink-ink is a negative edge detector. It detects the negative edge of the signal and outputs a signal.

The output of the orange and pink signal goes to another comparator to trigger when both condition are met-- when the neg edge is met and when the second clockpulse hit.

answer:

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