Assume a cache with the following properties: 32 bit address, 4 entries, directly mapped, 4 Byte cache blocks. Assume that at the beginning of the following sequence all cache entries are invalid. How many valid cache lines are in the cache after executing the following sequence of cache accesses. The following are byte addresses in hex. Address Sequence: 0x0FF0, 0x0FF1, 0x0FFF, 0x0F0F, 0x0D0F, 0x0DFF