1. Draw a single bus structure showing a detail connection of input, output, memory and pocessor. 2. Compare and contrast RISC verses CISC 3. Define Cache hit and cache miss 4. Consider the execution of five instructions I1–I5 on a pipeline consisting of six pipeline stages: FI (fetch instruction), DI (decode instruction), CO (calculate instruction), FO (fetch operand), EI (execute instruction), and WO (write operand or instruction results store). Assume that all the instruction has equal duration and goes through all six stages of the pipeline. Show the succession of instructions in the pipeline; that is, show the Gantt’s chart compare with sequential processing Calculate Speed-up S(n), Throughput U(n) and Efficiency E(n) for performance measure for the goodness of the pipeline 5. Briefly discuss the Memory hierarchy and Three cache mapping techniques, 6. Explain Three categories of instruction by 16-bit format (MRI, RRI and IOI) 7. Discuss each addressing mode within example 8. Discuss on instruction types, which include data movement, arithmetic/logical, instruction sequencing, and Input/Output. 9. What is stack pointer (SP) 10. Draw Generic model of I/O module​