Problems in this exercise refer to the following sequence of instructions: or r1,r2,r3
or r2,r1,r4
or r1,r1,r2
Also, assume the following cycle times for each of the options related to forwarding:
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Part 1: Indicate dependences and their type.
Read after write dependency in r1 between Instructions 1 and 2 & 3.
Read after write dependency in r2 between Instructions 2 and 3.
Write after read in r2 from Instruction 1 to 2.
Write after read in r1 from Instruction 2 to 3.
Write after read in r1 from Instruction 1 to 3.
Part 2: Assume there is no forwarding in this pipelined processor. Indicate hazards and add nop instructions to eliminate them.
No hazards from write after read and write after write, since there are 5 stages.
Read after writes cause data hazards.
or r1, r2, r3
NOP
NOP
or r2, r1, r4
NOP
NOP
or r1, r1, r2
Part 3: Assume there is full forwarding. Indicate hazards and add NOP instructions to eliminate them.
In full forwarding the data hazards above are eliminated, thus there is no need for NOP instructions.
Part 4: What is the total execution time of this instruction sequence without forwarding and with full forwarding?
Without forwarding:
TotalExecutionTime=(7 + 4) x 250ps = 2750ps
Full forwarding:
TotalExecutionTime=(7 + 0) x 300ps = 2100ps
What is the speedup achieved by adding full forwarding to a pipeline that had no forwarding?
Speed up: 2750 / 2100 = 1.3095
Part 5: Add nop instructions to this code to eliminate hazards if there is ALU-ALU forwarding only (no forwarding from the MEM to the EX stage).
Part 6: What is the total execution time of this instruction sequence with only ALU-ALU forwarding? What is the speedup over a no-forwarding pipeline?