Direct memory access is used for high-speed I/O devices in order to avoid increasing the CPU’s execution load. A. How does the CPU interface with the device to coordinate the transfer? B. How does the CPU know when the memory operations are complete? C. The CPU is allowed to execute other programs while the DMA controller is transferring data. Does this process interfere with the execution of user programs? If so, describe what forms of interference are caused.

so much for the extra points :

the answer is a   : ) hope that

solution:

this situation is called an ip conflict.

data from a server is sent in small bits called packets. in an ip conflict, some packets will end up in one computer while some other packets will end up in another computer.

so…overall none of the computers get the data as the original message or picture being sent by the server cannot be retrieved with only half the packets. so it will show up as an error.

thus the final answer is d.