Computers and Technology, 12.11.2020 19:10 viktoria1198zz
Assume a 5-stage MIPS pipeline implementation and consider the following sequence of instructions:
addi $s1, $s1, 20
lw $s2, 0($s1)
add $s3, $s1, $s2
add $s4, $s4, $s1
add $s4, $s2, $s5
1. Find all the data dependencies and identify the type of dependency (RAW, WAW, and WAR) for each.
2. What are the final values of $s1, $s2, $s3, $s4; assuming correct execution of the program segment, with initial values of $s1, $s2, $s3, $s4, and $s5 are 1000, 200, 50, 7, and 9 respectively and that memory locations 1000 and 1020 contains the values 300 and 150 respectively.
3. List the hazards assuming your processer does not include either a forwarding unit or a hazard detection unit. What will be the final values of $s1, $s2, $s3, and $s4 in this case as the program is originally written?
4. Add nop instruction(s) to eliminate the hazards you identified in question #3.
5. Now, assume your processor does include full forwarding. Indicate any remaining hazards and add nop instructions to eliminate them.
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