You are to create the following as separate components in VHDL CODE and link them together in VHDL CODE

1. Create a 4-bit shift register that has the following capabilities:
It can have its contents cleared.
2. It can shift its contents to the left, with the lsb being filled by 1-bit input.
3. It can rotate its contents to the left. |
4. List all control inputs needed from the FSM.
2. Create a 4-bit counter that has the following capabilities:
1. It can have its value reset to zero.
2. It can increment by 1
3. It can increment by 2
4. List all control inputs needed from the FSM.
3. Create a state machine that will do the following (in separate states),
Clear the register and reset the counter.
Perform some action on register (you specify which)
3. Perform some action on the counter (you specify which)
Perform a different action on the register (you specify which).
5. Perform a different action on the counter (you specify which).