Sketch a 2K x 32 memory built from 1K x 8 memory chips. Include control, address, and data line details, as well as any decoding needed. Label everything appropriately.

See my explanations and attachment

Explanation:

Construct an 8k X 32 ROM using 2k X 8 ROM chips and any additional required components. Show how the address and data lines of the constructed 8k X 32 ROM are connected to the 2k X 8 chips.

I tried to solve it but I am not sure if I got the correct answer. Could anyone check my drawing and correct me?

look at the engine block shown in the figure. the engine shown in this figure is a/an  

  a. four-cylinder, horizontally opposed engine.

  b. eight-cylinder, v-type engine.

  c. six-cylinder, v-type engine.

  d. four-cylinder, in-line engine