Design a 128KB direct-mapped data cache that uses a 32-bit address and 16 bytes per block. The design consists of two components: (1) The 32-bit memory address is subdivided into several sections in bits so that each address can map to its cache location (2) The cache itself including the cache storage and other necessary bits in each cache line. Explain your design.

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Explanation:

The cache contain 8K number of blocks.each block has 16 Byte worth of data. Each of these bytes are addressable by block offset. Now, each of these blocks are addressable and their address is provided by line offset or set offset. If block number is given in Decimal format then the block to which that block will be mapped is given by expression

mappedToBlock = (bNumber)mod213

TAG and valid but consititues something called cache controller. TAG holds the physical address information because the TAG in physical address get divided into TAG and line offset in cache address. Valid bit tells status of blocks. If it is 1 then data blocks are referred by CPI else not.