If the cache access time determines the processor’s clock cycle time, which is often the case, amat may not correctly indicate whether one cache organization is better than another. if the processor’s clock cycle time must be changed to match that of a cache, is this a good trade-off? assume the processors are identical except for the clock rate; assume 1.5 references per instruction and a cpi without cache misses of 2. the miss penalty is 20 cycles for both processors.