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For this part of lab 7 you will design the sign extender module for your armv8 processor in verilog. your module should take two inputs: instruction bits 25-0 and a two-bit control signal, and should output a 64-bit extended immediate. as an example, a rudimentary 16-to-32 bit sign extender is below.

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For this part of lab 7 you will design the sign extender module for your armv8 processor in verilog....
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